LCOV - code coverage report
Current view: top level - asmjit - armformatter.cpp (source / functions) Hit Total Coverage
Test: plumed test coverage (other modules) Lines: 0 21 0.0 %
Date: 2026-11-05 10:19:06 Functions: 0 3 0.0 %

          Line data    Source code
       1             : #ifdef __PLUMED_HAS_ASMJIT
       2             : // This file is part of AsmJit project <https://asmjit.com>
       3             : //
       4             : // See asmjit.h or LICENSE.md for license and copyright information
       5             : // SPDX-License-Identifier: Zlib
       6             : 
       7             : #include "api-build_p.h"
       8             : #ifndef ASMJIT_NO_LOGGING
       9             : 
      10             : #include "misc_p.h"
      11             : #include "support.h"
      12             : #include "armformatter_p.h"
      13             : #include "armoperand.h"
      14             : #include "a64instapi_p.h"
      15             : #include "a64instdb_p.h"
      16             : 
      17             : #ifndef ASMJIT_NO_COMPILER
      18             :   #include "compiler.h"
      19             : #endif
      20             : 
      21             : ASMJIT_BEGIN_SUB_NAMESPACE(arm)
      22             : 
      23             : // arm::FormatterInternal - Format Feature
      24             : // =======================================
      25             : 
      26           0 : Error FormatterInternal::formatFeature(String& sb, uint32_t featureId) noexcept {
      27             :   // @EnumStringBegin{"enum": "CpuFeatures::ARM", "output": "sFeature", "strip": "k"}@
      28             :   static const char sFeatureString[] =
      29             :     "None\0"
      30             :     "THUMB\0"
      31             :     "THUMBv2\0"
      32             :     "ARMv6\0"
      33             :     "ARMv7\0"
      34             :     "ARMv8a\0"
      35             :     "ARMv8_1a\0"
      36             :     "ARMv8_2a\0"
      37             :     "ARMv8_3a\0"
      38             :     "ARMv8_4a\0"
      39             :     "ARMv8_5a\0"
      40             :     "ARMv8_6a\0"
      41             :     "ARMv8_7a\0"
      42             :     "VFPv2\0"
      43             :     "VFPv3\0"
      44             :     "VFPv4\0"
      45             :     "VFP_D32\0"
      46             :     "AES\0"
      47             :     "ALTNZCV\0"
      48             :     "ASIMD\0"
      49             :     "BF16\0"
      50             :     "BTI\0"
      51             :     "CPUID\0"
      52             :     "CRC32\0"
      53             :     "DGH\0"
      54             :     "DIT\0"
      55             :     "DOTPROD\0"
      56             :     "EDSP\0"
      57             :     "FCMA\0"
      58             :     "FJCVTZS\0"
      59             :     "FLAGM\0"
      60             :     "FP16CONV\0"
      61             :     "FP16FML\0"
      62             :     "FP16FULL\0"
      63             :     "FRINT\0"
      64             :     "I8MM\0"
      65             :     "IDIVA\0"
      66             :     "IDIVT\0"
      67             :     "LSE\0"
      68             :     "MTE\0"
      69             :     "RCPC_IMMO\0"
      70             :     "RDM\0"
      71             :     "PMU\0"
      72             :     "PMULL\0"
      73             :     "RNG\0"
      74             :     "SB\0"
      75             :     "SHA1\0"
      76             :     "SHA2\0"
      77             :     "SHA3\0"
      78             :     "SHA512\0"
      79             :     "SM3\0"
      80             :     "SM4\0"
      81             :     "SSBS\0"
      82             :     "SVE\0"
      83             :     "SVE_BF16\0"
      84             :     "SVE_F32MM\0"
      85             :     "SVE_F64MM\0"
      86             :     "SVE_I8MM\0"
      87             :     "SVE_PMULL\0"
      88             :     "SVE2\0"
      89             :     "SVE2_AES\0"
      90             :     "SVE2_BITPERM\0"
      91             :     "SVE2_SHA3\0"
      92             :     "SVE2_SM4\0"
      93             :     "TME\0"
      94             :     "<Unknown>\0";
      95             : 
      96             :   static const uint16_t sFeatureIndex[] = {
      97             :     0, 5, 11, 19, 25, 31, 38, 47, 56, 65, 74, 83, 92, 101, 107, 113, 119, 127,
      98             :     131, 139, 145, 150, 154, 160, 166, 170, 174, 182, 187, 192, 200, 206, 215,
      99             :     223, 232, 238, 243, 249, 255, 259, 263, 273, 277, 281, 287, 291, 294, 299,
     100             :     304, 309, 316, 320, 324, 329, 333, 342, 352, 362, 371, 381, 386, 395, 408,
     101             :     418, 427, 431
     102             :   };
     103             :   // @EnumStringEnd@
     104             : 
     105           0 :   return sb.append(sFeatureString + sFeatureIndex[Support::min<uint32_t>(featureId, uint32_t(CpuFeatures::ARM::kMaxValue) + 1)]);
     106             : }
     107             : 
     108             : // arm::FormatterInternal - Format Constants
     109             : // =========================================
     110             : 
     111           0 : ASMJIT_FAVOR_SIZE Error FormatterInternal::formatCondCode(String& sb, CondCode cc) noexcept {
     112             :   static const char condCodeData[] =
     113             :     "al\0" "na\0"
     114             :     "eq\0" "ne\0"
     115             :     "cs\0" "cc\0" "mi\0" "pl\0" "vs\0" "vc\0"
     116             :     "hi\0" "ls\0" "ge\0" "lt\0" "gt\0" "le\0"
     117             :     "<Unknown>";
     118           0 :   return sb.append(condCodeData + Support::min<uint32_t>(uint32_t(cc), 16u) * 3);
     119             : }
     120             : 
     121           0 : ASMJIT_FAVOR_SIZE Error FormatterInternal::formatShiftOp(String& sb, ShiftOp shiftOp) noexcept {
     122             :   const char* str = "<Unknown>";
     123           0 :   switch (shiftOp) {
     124           0 :     case ShiftOp::kLSL: str = "lsl"; break;
     125           0 :     case ShiftOp::kLSR: str = "lsr"; break;
     126           0 :     case ShiftOp::kASR: str = "asr"; break;
     127           0 :     case ShiftOp::kROR: str = "ror"; break;
     128           0 :     case ShiftOp::kRRX: str = "rrx"; break;
     129           0 :     case ShiftOp::kMSL: str = "msl"; break;
     130           0 :     case ShiftOp::kUXTB: str = "uxtb"; break;
     131           0 :     case ShiftOp::kUXTH: str = "uxth"; break;
     132           0 :     case ShiftOp::kUXTW: str = "uxtw"; break;
     133           0 :     case ShiftOp::kUXTX: str = "uxtx"; break;
     134           0 :     case ShiftOp::kSXTB: str = "sxtb"; break;
     135           0 :     case ShiftOp::kSXTH: str = "sxth"; break;
     136           0 :     case ShiftOp::kSXTW: str = "sxtw"; break;
     137           0 :     case ShiftOp::kSXTX: str = "sxtx"; break;
     138             :   }
     139           0 :   return sb.append(str);
     140             : }
     141             : 
     142             : ASMJIT_END_SUB_NAMESPACE
     143             : 
     144             : #endif // !ASMJIT_NO_LOGGING
     145             : 
     146             : #endif // __PLUMED_HAS_ASMJIT

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